In conventional MOSFETs, the maximum donor concentration [ND] in an n−-type region and thus also the electrical conductivity of the n−-type region are determined by the required locking capability, or vice versa. In the event of avalanche breakdown, approximately 1.5×1012 cm−2 donors are then ionized, the countercharge of which is found in the acceptor charge of the p-conducting region of the MOSFET structure. If a higher donor concentration is to be made possible, then countercharges for the donor atoms of the n−-type region have to be found approximately in the same component plane. In the case of MOS field plate transistors comprising a trench structure such as are known from the document U.S. Pat. No. 6,573,558 B2, this takes place via the charge carriers of the field plate. In the case of compensation components, such as in the case of “CoolMOS”, which have n−-type regions and p-type regions arranged alternately in cells, this takes place via acceptors of the p-type regions as countercharges.
In this context, an n−-type or p−-type region is understood to be a region of a semiconductor component which is weakly doped and has a defect concentration [ND] or [NP], respectively, of between1×1012 cm−3≦([ND] or [NP])≦1×1017 cm−3 where [ND] is the donor concentration and [NP] is the acceptor concentration.
An n-type or p-type region is understood to be a region of a semiconductor component which is medium-doped and has a defect concentration of between1×1017 cm−3≦([ND] or [NP])≦1×1018 cm−3 An n+-type or p+-type region is understood to be a region of a semiconductor component which is highly doped and has a defect concentration of between1×1018 cm−3≦([ND] or [NP])≦1×1020 cm−3 
A metallically conducting semiconductor region is understood to be a region of a semiconductor component which has an extremely high doping and has a defect concentration of between1×1020 cm−3≦([ND] or [NP])≦1×1022 cm−3.
If the intention is to further improve the electrical conductivity of an n−-type region in the case of compensation components such as e.g. “CoolMOS”, then the degree of compensation has to be set more and more precisely. This is encountering the limits of technological feasibility even today. The MOS field plate transistors comprising a trench structure which are known from U.S. Pat. No. 673,558 B2 have the disadvantage that, depending on the type of connection of the field plate, the entire reverse voltage is dropped either at the source end or at the drain end with respect to the n−-type region and very thick insulation layers are thus required. At a continuous loading of 600 V, approximately 6 μm thick SiO2 would be required, which significantly reduces the effect of the field plate in providing countercharges.
Further semiconductor devices comprising trench structures are known from the document U.S. Pat. No. 6,608,350 B2. With trench structures of this type, it is possible to fabricate a high-voltage transistor having a low forward resistance on an n+-conducting semiconductor substrate with a weakly doped semiconductor body region on the n+-conducting semiconductor substrate by virtue of the trench structure in the weakly doped semiconductor body region, on the top side of the transistors, being completely filled with a dielectric having a high relative permittivity ∈r.
Instead of more precise compensation in the case of “CoolMOS”, the patent applications DE 10 2004 007 197.7 and DE 10 2004 007 196.9 proposed providing the countercharge via a trench capacitor having a significantly higher capacitance than the surrounding Si. In order to create technically or economically attractive possibilities for use, the relative permittivity of the insulator with which the trench in the Si is filled would have to be approximately ∈r≈1000. Given typical trench widths and widths of the n−-type region in the region of a few μm, on resistance values that are at least a factor or 3 better than in the case of “CoolMOS” at the present time can be achieved for 600 V components.
However, in order to fill these trench structures with suitable materials having a high relative permittivity, the above documents propose, for filling the trench structures, a material such as BaxSryTiO3, by way of example, which, however, exhibits a strong temperature response with regard to the relative permittivity ∈r, its breakdown dielectric strength simultaneously decreasing, so that it is practically impossible to use them in power semiconductor switches in which correspondingly high temperatures are developed as a result of the heat loss. Moreover, materials of this type have hitherto not as yet been introduced or tried and tested in semiconductor technology.
In addition, for the purpose of obtaining a high relative permittivity Er of approximately 1000, the above documents propose the use of layered capacitors which alternately have conductive and insulation layers stacked one on top of the other in order to achieve a small overall thickness of the electrically insulating layers in relation to the depth Tg of the trench structure, in order thus to drastically increase the effective relative permittivity. However, the above patent applications fail firstly to disclose suitable materials with which a layered capacitor of this type is to be equipped, and secondly there is no discussion at all of how, in a trench structure a few micrometers wide in a trench several micrometers deep, a layered capacitor can be realized with a tenable outlay in respect of costs.
Furthermore, in the case of trench structures having a width of a few micrometers and a depth of tens of micrometers, there is the problem that harmful shrink holes and/or the inlet slots to the narrow trench close even before the trench structure itself has been filled with corresponding dielectric material.